Designed and implemented a C++20 cache with per-node physical block allocation, PMR-backed containers, and per-node sharded key stores. Used SeqLock-based lock-free reads to remove synchronization from the read path, and a concurrent Swiss table with SSE2 SIMD probing and per-slot seqlock concurrency as the backing store for the ARC policy, with deferred promotions through a lock-free MPSC buffer.
Added staging pages so the write path has an O(1) fast path decoupled from eviction, and benchmarked an S3-FIFO policy with a per-slot atomic frequency counter against LRU.
Validated on real multi-socket hardware (EC2 c6a.metal, AMD EPYC Milan, 4 NUMA nodes, and c6i.metal, Intel Ice Lake) and published the design and evaluation as a technical report with a Zenodo DOI.